2024 Per-Bank Bandwidth Regulation of Shared Last-Level Cache for Real-Time Systems Connor Sullivan, Alexander Manley, Mohammad Alian, and 1 more author In 2024 IEEE Real-Time Systems Symposium (RTSS), 2024 Bib PDF @inproceedings{SullivanRegulation2024, author = {Sullivan, Connor and Manley, Alexander and Alian, Mohammad and Yun, Heechul}, booktitle = {2024 IEEE Real-Time Systems Symposium (RTSS)}, title = {Per-Bank Bandwidth Regulation of Shared Last-Level Cache for Real-Time Systems}, year = {2024}, volume = {}, number = {}, pages = {}, keywords = {}, url = {https://arxiv.org/abs/2410.14003}, doi = {10.48550/arXiv.2410.14003}, } 2023 Profiling gem5 Simulator Johnson Umeike, Neel Patel, Alexander Manley, and 3 more authors In 2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2023 Bib PDF @inproceedings{UmeikeProfiling2023, author = {Umeike, Johnson and Patel, Neel and Manley, Alexander and Mamandipoor, Amin and Yun, Heechul and Alian, Mohammad}, booktitle = {2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)}, title = {Profiling gem5 Simulator}, year = {2023}, volume = {}, number = {}, pages = {103-113}, keywords = {Analytical models;Codes;Microarchitecture;Source coding;Computational modeling;Software;Performance analysis}, doi = {10.1109/ISPASS57527.2023.00019}, } 2022 Profiling an Architectural Simulator Nedasadat Taheri, Alexander Manley, Ahmni R. Pang, and 1 more author In 2022 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2022 Bib PDF @inproceedings{TaheriProfiling2022, author = {Taheri, Nedasadat and Manley, Alexander and Pang, Ahmni R. and Alian, Mohammad}, booktitle = {2022 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)}, title = {Profiling an Architectural Simulator}, year = {2022}, volume = {}, number = {}, pages = {233-235}, keywords = {Analytical models;Codes;Microarchitecture;Software;Performance analysis;Tuning;gem5;profiling;Top-Down-Analysis;performance;huge-pages;architectural-simulation;microarchitecture-simulation}, doi = {10.1109/ISPASS55109.2022.00032}, }